Among the semiconductor devices equipped with small, large-current electronic components, there is a semiconductor device in which semiconductor chips are fixed to a metal layer (conductive pattern) on an insulating substrate via solder layers. In this type of semiconductor device, when mounting electronic components on the metal layer formed on the insulating substrate, the solder layers are likely to shift toward the periphery on the metal layer, and spread to an end of the metal layer or even to the other electronic components mounted on the metal layer.
When the solder layers spread toward an end of the metal layer, a section on the insulating substrate near the end of the metal layer is exposed to large stress when the entire semiconductor device is heated by the heat generated from the electronic components. This can cause cracks on the periphery of each solder layer, damaging the electric connection in the semiconductor device. The solder layers spreading toward the other electronic components can also result in having an impact on how these electronic components are joined.
Therefore, in the semiconductor device equipped with small, large-current electronic components, a lead frame formed from a metal plate can be used as a wiring member in place of a conventional aluminum or copper wire so as to secure a current capacity and realize a cooling mechanism for releasing the heat of the electronic components to the outside while absorbing it. The lead frame can be soldered, at either end, to the electronic components, e.g. electrodes of semiconductor chips, and a conductive pattern formed on the insulating substrate. As a result, electrical connection between the semiconductor chips or between the conductive pattern and the semiconductor chips can be secured, and at the same time the lead frame itself can function to release the heat of the semiconductor chips to the outside. Such a lead frame is configured generally by a copper plate, copper alloy (Cu—Fe—Cu, Al—Fe, CuMo), or the like.
FIGS. 11(A), 11(B) are diagrams showing an example of a conventional semiconductor device, wherein FIG. 11(A) is a plan view of the semiconductor device and FIG. 11(B) is a cross-sectional view taken along the line B-B.
A ceramic substrate 11 is an insulating substrate 10 which is formed by joining conductive patterns 12, 13, formed from metal layers of a predetermined shape, to either side of the ceramic substrate 11, to configure a semiconductor device of a module structure to be soldered onto an upper surface of a base substrate, not shown. In this semiconductor device, a semiconductor chip 14 and a diode chip 15, which form an insulated gate bipolar transistor (IGBT), are loaded in predetermined positions on the conductive pattern 12 on the front side of the ceramic substrate 11 via solder layers 16, 17, respectively, and a metal plate 18 is disposed thereon as a wiring member, the semiconductor chip 14 being referred to as “IGBT chip” below. As described above, the metal plate 18 is formed widely as a lead frame to electrically connect the IGBT chip 14 and the diode chip 15 to each other and to the conductive pattern 12, in such a manner as to release the heat of the chips 14, 15 to the outside while absorbing it.
Such a metal plate 18 forming a lead frame is positioned on the insulating substrate 10, with predetermined size of solder plates 19a, 19b, 19c interposed therebetween, and then joined to the insulating substrate 10 by melting the solder plates 19a, 19b, 19c in a single reflow step. In so doing, prior to the reflow step, joining surfaces 18a, 18b, 18c of the metal plate 18 need to be disposed in predetermined positions on the insulating substrate 10 along with the respective solder plates 19a, 19b, 19c. In particular, when assembling a small, large-current semiconductor device, the metal plate 18 is required to be positioned correctly.
FIG. 12 is a plan view showing a positioning frame body used for positioning the lead frame of the conventional semiconductor device.
A positioning frame body 20 is a frame body (segment) positioned and disposed in a predetermined position on the conductive pattern 12 by the IGBT chip 14 and the diode chip 15 mounted thereon. This positioning frame body 20 defines a single closed region with a frame 20a that determines a range on the left-hand side of the IGBT chip 14 in the conductive pattern 12, an outer circumferential frame 20b of the IGBT chip 14, an outer circumferential frame 20c of the diode chip 15, and a connecting frame 20d connecting the outer circumferential frames 20b, 20c to each other. Consequently, the position on the conductive pattern 12 where the metal plate 18 shown in FIGS. 11(A), 11(B) should be disposed (shown by the virtual line 18i in the diagram) can be determined.    Patent Document 1: Japanese Patent Application Publication No. 2009-170543    Patent Document 2: Japanese Patent Application Publication No. 2009-253131
In such a conventional semiconductor device, when soldering an ordinary lead frame onto the chips 14, 15, the solder plates 19b, 19c are often shifted in the front-back and right-left directions. This makes it difficult to correctly position the solder plates 19b, 19c in the positions of the electrodes of the IGBT chip 14 and the diode chip 15. It is also difficult to make the thickness of the solder layers uniform, the solder layers being used for joining the metal plate 18 to the insulating substrate 10 by melting the solder plates 19a, 19b, 19c in a single reflow step. Especially when there is a big difference in thermal expansion coefficient between the metal plate 18 and each of the chips 14, 15, the thickness of each solder layer becomes non-uniform. Or when the area for a solder fillet becomes insufficient, sufficient long-term reliability of the solder joints cannot be achieved because of thermal stress.
With the downsizing of the semiconductor device itself, it is difficult to correctly position the metal plate 18 and the solder plates 19a, 19b, 19c at the same time, oven when the conventional positioning frame body 20 is used. Therefore, the problem to be solved is how to release the heat of the chips 14, to the outside efficiently. As described above, the problem in assembling the lead frame of the conventional semiconductor device is difficulty in positioning the metal plate 18 and the like on the insulating substrate 10, therefore, positions for joining them together is unstable.
The present invention was contrived in view of the circumstances described above, and an object thereof is to provide a semiconductor device of improved reliability and ease of assembly associated with the downsizing thereof, in which a long life of a solder joining a lead frame having a large current capacity and efficient release of heat from the lead frame can be achieved, and to also provide a method of manufacturing such a semiconductor device.